I would like to take some time to discuss a wonderful coding tool that is provided by a number of modern chips makers. I am (of course) talking about the Non Maskable Interrupt (NMI).

In general, there are two System Registers that are used to manage system interrupts – the Interrupt Mask Register and the Interrupt Cause Register. The Interrupt Mask Register allows the root user to disable/enable specific interrupts. This register contains a bit for each interrupt type. The Interrupt Cause Register indicates when the interrupts are ready for service. This register also contains a bit for each interrupt type.