Experience – Cisco

Cisco Systems
San Jose, CA
Technical Lead
January 1997 to July 2001

My work revolved around Cisco’s embedded, real time OS – IOS.

  • Designed a modularity methodology for IOS. This allowed IOS libraries to be tested on a workstation so that software could be validated prior to being loaded on a router. Significantly reduced lab costs and provided a regression test for development.
  • Designed and implemented an IOS Kernel Debugger that could be entered via the monitor, the console, or a memory dump. Included full virtual memory support: malloc, memory maps, and memory leak detection. Included full process support, formatted printing of kernel data structures, a symbolic disassembler, symbol address translation, and a 64 bit calculator. The kernel debugger was fully configurable and ran on it¡¦s own stack.
  • Member of a team that redesigned the port adaptor subsystem to employ a virtual function table. This allowed the platform dependent code to be separated from the platform independent code. This greatly simplified port adaptor bring up.
  • Designed and implemented a ROMMON flash memory dump mechanism. This allowed system memory to be dumped to flash cards from the boot prom.
  • Ported IOS ENA (Unix based micro kernel) to the 4700 platform. This required rewriting the following subsystems: NIM, EPROM2444, 4700 PCI, AMD9970 Ethernet Driver, Lance Ethernet Driver, and HD64570 Serial Driver. This was the first non-reference port of IOS ENA.
  • Member of the team that implemented E1/R2 on the 5300 platform. The work was based on TI/CAS. I was responsible for changes to the VTSP subsystem.
  • Senior IOS Engineer in the RPM group.
  • The RPM was a blade version of the 7200 router that acted as a line card in the ATM switch (MGX). The ATMDX (ATM port adaptor) was used to connect the RPM to the MGTX back plane. Hence, communication between the RPM and the switch controller (PXM) was done via ATM.
  • Responsible for ATM performance on the RPM.
  • Made changes so that full OC3 line rate could be achieved.
  • Identified design changes needed to allow IOS to support 4K IDBs.
  • Enhanced kernel profiling.
  • Designed and implemented an IOS diagnostics subsystem. Employed both hardware and software diagnostics. Allowed diagnostics to be run at boot time, in the background, and from the CLI. Errors were reported back to the PXM. This subsystem was required for RPM diagnosability and redundancy.
  • Designed and implemented an ATM DX microcode debugging mechanism. Allowed ATM DX debugging from IOS. Included ASSERTs, event logging, code tracing, and viewing of ATM DX data structures.
  •   Designed and implemented an RPM/PXM memory dump mechanism. Cisco routers relied on IP connectivity to perform memory dumping. The RPM was often times not directly connected to the IP, so obtaining memory dumps was impossible. This mechanism allowed RPM memory dumps to be stored on the PXM hard drive.
  •   Increased RPM diagnosability by adding CLI commands to display the following hardware info: NVRAM, MIPS Cause, Status, Config registers, and TLB.
  • Held tech talks on the following: IOS ENA, port adaptor subsystem. memory leaks, IOS virtual memory, and NVRAM.
  • Project lead for RPM-400 bring up. This entailed porting the RPM to the MIPS R5000 cpu. Included 3-way cache, new system controller, new flash, new memory DIMS, no SRAM.
  •   Designed and implemented a mechanism to manager ECC Single Bit Errors.
  •   Designed and implemented an RPM/PXM error message facility. Allowed the RPM to report errors to the PXM.
  •   Designed and implemented an RPM/PXM heart beat mechanism. Provided a reliable polling service for PXM to RPM traffic.
  • Designed and implemented an RPM system image checksum mechanism. Helped prevent boot errors.
  •   Designed a facility to allow the RPM to perform memory dumps to a disk drive port adaptor.
  •   Senior Engineer in the IVR group.
  •   Designed and implemented an IVR malloc mechanism – to track memory usage and help detect memory leaks.